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Fusing convolution kernels through tiling., , and . ARRAY@PLDI, page 43-48. ACM, (2015)Distributed memory code generation for mixed Irregular/Regular computations., , , , , , and . PPoPP, page 65-75. ACM, (2015)Effective resource management for enhancing performance of 2D and 3D stencils on GPUs., , , , , and . GPGPU@PPoPP, page 92-102. ACM, (2016)Forma: a DSL for image processing applications to target GPUs and multi-core CPUs., , and . GPGPU@PPoPP, page 109-120. ACM, (2015)Dynamic trace-based analysis of vectorization potential of applications., , , , , , and . PLDI, page 371-382. ACM, (2012)Resource Conscious Reuse-Driven Tiling for GPUs., , , , , , and . PACT, page 99-111. ACM, (2016)Optimal loop unrolling for GPGPU programs., , , and . IPDPS, page 1-11. IEEE, (2010)Code generation for parallel execution of a class of irregular loops on distributed memory systems., , , , , and . SC, page 72. IEEE/ACM, (2012)Composable and Modular Code Generation in MLIR: A Structured and Retargetable Approach to Tensor Compiler Construction., , , , , , , , , and 2 other author(s). CoRR, (2022)Automatic parallelization of a class of irregular loops for distributed memory systems., , , , , and . ACM Trans. Parallel Comput., 1 (1): 7:1-7:37 (2014)