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Disambiguation of "Sciuto, Donatella"

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FPGA-Based Embedded System Implementation of Audio Signal Alignment.

, , , and . IPDPS Workshops, page 132-139. IEEE, (2019)

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Donatella Cesare

Donatella Cesare

Donatella Germanese

Donatella Giovannini

Donatella Fiala

 

Other publications of authors with the same name

Using Critical Success Factors for Assessing Critical Activities in ERP Implementation within SMEs., , and . ICEIS (1), page 285-292. (2005)Task Partitioning for the Scheduling on Reconfigurable Systems driven by Specification Self-Similarity., , , and . ERSA, page 78-84. CSREA Press, (2007)TaBit: A framework for task graph to bitstream generation., , , , , and . ICSAMOS, page 201-208. IEEE, (2012)Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs., , , , , and . IESS, volume 231 of IFIP Advances in Information and Communication Technology, page 179-192. Springer, (2007)An adaptive genetic algorithm for dynamically reconfigurable modules allocation., , , and . VLSI-SoC, page 128-133. IEEE, (2007)A light-weight Network-on-Chip architecture for dynamically reconfigurable systems., , , and . ICSAMOS, page 49-56. IEEE, (2008)A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures., , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 177-196. Springer, (2006)D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems., , , , and . ReCoSoC, page 1-6. IEEE, (2013)Combining hardware reconfiguration and adaptive computation for a novel SoC design methodology., , , and . FPT, page 293-296. IEEE, (2006)A Functional Approach to Delay Faults Test Generation for Sequential Circuits., , and . EDAC-ETC-EUROASIC, page 51-57. IEEE Computer Society, (1994)