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Disambiguation of "Sedaghati, Naser"

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Fast Sparse Matrix-Vector Multiplication on GPUs for Graph Applications.

, , , , and . SC, page 781-792. IEEE Computer Society, (2014)

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Thomas Naser

Markus Näser

Christiane Näser

Mohammad Hassan Nasermoaddeli

Hassan Naseri

 

Other publications of authors with the same name

Core tunneling: Variation-aware voltage noise mitigation in GPUs., , , , and . HPCA, page 151-162. IEEE Computer Society, (2016)Automatic Selection of Sparse Matrix Representation on GPUs., , , , and . ICS, page 99-108. ACM, (2015)EmerGPU: Understanding and mitigating resonance-induced voltage noise in GPU architectures., , and . ISPASS, page 79-89. IEEE Computer Society, (2016)An efficient two-dimensional blocking strategy for sparse matrix-vector multiplication on GPUs., , , and . ICS, page 273-282. ACM, (2014)Adaptive Time-based Encoding for Energy-Efficient Large Cache Architectures., , and . E2SC@SC, page 5:1-5:8. ACM, (2017)Fast Sparse Matrix-Vector Multiplication on GPUs for Graph Applications., , , , and . SC, page 781-792. IEEE Computer Society, (2014)A model-driven blocking strategy for load balanced sparse matrix-vector multiplication on GPUs., , , and . J. Parallel Distributed Comput., (2015)On Using the Roofline Model with Lower Bounds on Data Movement., , , , , , and . ACM Trans. Archit. Code Optim., 11 (4): 67:1-67:23 (2014)Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips., , , , and . HPCA, page 27-38. IEEE Computer Society, (2012)StVEC: A Vector Instruction Extension for High Performance Stencil Computation., , , , and . PACT, page 276-287. IEEE Computer Society, (2011)