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Integrated circuits design using carbon nanotube field effect transistor.

. ISOCC, page 125-126. IEEE, (2016)

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A high-efficiency fully digital synchronous buck converter power delivery system based on a finite-state machine., , and . IEEE Trans. Very Large Scale Integr. Syst., 14 (3): 229-240 (2006)Standing Wave Oscillator Based Clock Distribution Minimizing Equivalent Capacitance for Process and Temperature variation., , and . ISOCC, page 241-242. IEEE, (2019)A CMOS Low-Power Digital Polar Modulator System Integration for WCDMA Transmitter., and . IEEE Trans. Ind. Electron., 59 (2): 1154-1160 (2012)Fault tolerant clockless wave pipeline design., , , , , and . Conf. Computing Frontiers, page 350-356. ACM, (2004)A low-offset high-speed double-tail dual-rail dynamic latched comparator., and . ACM Great Lakes Symposium on VLSI, page 45-48. ACM, (2010)A low power high resolution digital PWM with process and temperature calibrations for digital controlled DC-DC converters., and . ACM Great Lakes Symposium on VLSI, page 75-76. ACM, (2014)Switched Capacitor and Infinite Impulse Response Summation for a Quarter-Rate DFE with 4Gb/s Data Rate., and . ACM Great Lakes Symposium on VLSI, page 439-442. ACM, (2017)Fully Integrated on-Chip Switched DC-DC Converter for Battery-Powered Mixed-Signal SoCs., , and . Symmetry, 9 (1): 18 (2017)Generalized Adaptive Variable Bit Truncation Method for Approximate Stochastic Computing., , , and . ISOCC, page 218-219. IEEE, (2018)Guest Editorial., and . J. Electron. Test., 25 (1): 9-10 (2009)