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Disambiguation of "Jaeger, Richard C."

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A novel DDS architecture using nonlinear ROM addressing with improved compression ratio and quantisation noise.

, , , and . ISCAS (2), page 705-708. IEEE, (2004)

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Richard Jaeger

Richard Jaeger

Richard C Domek

Richard C Trexler

Richard C Müller

 

Other publications of authors with the same name

Implementation of RBF type networks by MLP networks., and . ICNN, page 1670-1675. IEEE, (1996)Integrated blind electronic equalizer for fiber dispersion compensation., , and . ISCAS (6), page 5750-5753. IEEE, (2005)CMOS stress sensors on 100 silicon., , , , and . IEEE J. Solid State Circuits, 35 (1): 85-95 (2000)An 11-bit 8.6GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DAC., , , , and . ESSCIRC, page 362-365. IEEE, (2008)An X- and Ku-Band Wideband Recursive Receiver MMIC With Gain-Reuse., , , and . IEEE J. Solid State Circuits, 46 (3): 562-571 (2011)CMOS implementation of a pulse-coupled neuron cell., , , and . ICNN, page 986-990. IEEE, (1996)Neuro-fuzzy architecture for CMOS implementation., , and . IEEE Trans. Ind. Electron., 46 (6): 1132-1136 (1999)An 11-Bit 8.6 GHz Direct Digital Synthesizer MMIC With 10-Bit Segmented Sine-Weighted DAC., , , and . IEEE J. Solid State Circuits, 45 (2): 300-313 (2010)A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 µm SiGe BiCMOS Technology., , , and . IEEE J. Solid State Circuits, 43 (6): 1384-1393 (2008)24-Bit 5.0 GHz Direct Digital Synthesizer RFIC With Direct Digital Modulations in 0.13 μ m SiGe BiCMOS Technology., , , and . IEEE J. Solid State Circuits, 45 (5): 944-954 (2010)