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Approximate hardware generation using symbolic computer algebra employing grobner basis.

, , and . DATE, page 889-892. IEEE, (2018)

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Approximate hardware generation using symbolic computer algebra employing grobner basis., , and . DATE, page 889-892. IEEE, (2018)Approximate Hardware Generation Using Formal Techniques., , and . Approximate Circuits, Springer, (2019)Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications., , , , , and . VLSI-SoC, page 1-6. IEEE, (2022)Logic Synthesis for Hybrid CMOS-ReRAM Sequential Circuits., , and . ISVLSI, page 431-436. IEEE, (2019)Polynomial Formal Verification of Approximate Adders., , and . DSD, page 761-768. IEEE, (2022)Depth Optimized Synthesis of Symmetric Boolean Functions., , and . ISVLSI, page 61-66. IEEE, (2021)LiM-HDL: HDL-Based Synthesis for In-Memory Computing., and . DATE, page 1395-1400. IEEE, (2022)Parallel Computing of Graph-based Functions in ReRAM., , and . ACM J. Emerg. Technol. Comput. Syst., 18 (2): 41:1-41:24 (2022)A Fully Fledged HDL Design Flow for In-Memory Computing with Approximation Support. Bremen University, Germany, (2022)base-search.net (ftsubbremen:oai:media.suub.uni-bremen.de:Publications/elib/5742).Multiply-Accumulate Enhanced BDD-Based Logic Synthesis on RRAM Crossbars., , and . ISCAS, page 1-5. IEEE, (2020)