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Effect of measurement speed (μs-800 ps) on the characterization of reliability behaviors for FDSOI nMOSFETs., , , , , , , , и . IRPS, стр. 6. IEEE, (2018)FDSOI: From substrate to devices and circuit applications., , , , и . ESSCIRC, стр. 45-51. IEEE, (2010)22FD-SOI Variability Improvement Thanks to SmartCut Thickness Control at Atomic Scale., , , , , , и . ESSDERC, стр. 64-65. IEEE, (2019)Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections., , , , , , , , , и 15 other автор(ы). VLSI Technology and Circuits, стр. 330-331. IEEE, (2022)Smart Cut™ technology: from Substrate Enginnering to Advanced 3D Integration., , и . ICICDT, стр. 81-83. IEEE, (2022)Strained silicon on insulator substrates for fully depleted application., , , , , , , , , и . ICICDT, стр. 1-4. IEEE, (2012)Layout engineering to suppress hysteresis of negative capacitance FinFET., , , и . ICICDT, стр. 1-3. IEEE, (2017)Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below., , , , , , , , , и 21 other автор(ы). ESSCIRC, стр. 88-91. IEEE, (2009)FD-SOI material enabling CMOS technology disruption from 65nm to 12nm and beyond., , , , и . ICICDT, стр. 1-2. IEEE, (2017)Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with BEOL 3D Monolithically Integrated IGZO Access Transistor for 4F2 High-Density Integration., , , , , , , , и . VLSI Technology and Circuits, стр. 1-2. IEEE, (2023)