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ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation.

A. Ottaviano, R. Balas, G. Bambini, A. del Vecchio, M. Ciani, D. Rossi, L. Benini, and A. Bartolini. Int. J. Parallel Program., 52 (1): 93-123 (April 2024)

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Davide Rossi

Davide Pennino

Davide Cadamuro

Davide Batic

Davide Pagani

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Resilient Reactive Systems Based on Runtime Semantic Models.E. Giallonardo, F. Poggi, D. Rossi, and E. Zimeo. ISSRE Workshops, page 177-184. IEEE, (2019)Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS.M. Scherer, M. Eggimann, A. Mauro, A. Prasad, F. Conti, D. Rossi, J. Gómez, Z. Li, S. Sarwar, Z. Wang and 2 other author(s). ESSCIRC, page 217-220. IEEE, (2023)A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode.A. Garofalo, G. Ottavi, A. Mauro, F. Conti, G. Tagliavini, L. Benini, and D. Rossi. ESSCIRC, page 267-270. IEEE, (2021)End-to-end 100-TOPS/W Inference With Analog In-Memory Computing: Are We There Yet?G. Ottavi, G. Karunaratne, F. Conti, I. Boybat, L. Benini, and D. Rossi. AICAS, page 1-4. IEEE, (2021)Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference.N. Bruschi, G. Tagliavini, F. Conti, S. Abadal, A. Cabellos-Aparicio, E. Alarcón, G. Karunaratne, I. Boybat, L. Benini, and D. Rossi. AICAS, page 170-173. IEEE, (2022)GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors.N. Bruschi, G. Haugou, G. Tagliavini, F. Conti, L. Benini, and D. Rossi. ICCD, page 409-416. IEEE, (2021)A FPGA Implementation of An Open-Source Floating-Point Computation System.C. Brunelli, F. Garzia, J. Nurmi, C. Mucci, F. Campi, and D. Rossi. SoC, page 29-32. IEEE, (2005)A Fully Programmable eFPGA-Augmented SoC for Smart Power Applications.F. Renzini, C. Mucci, D. Rossi, E. Scarselli, and R. Canegallo. IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (2): 489-501 (2020)Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters.F. Glaser, G. Tagliavini, D. Rossi, G. Haugou, Q. Huang, and L. Benini. CoRR, (2020)Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node.A. Mauro, F. Conti, P. Schiavone, D. Rossi, and L. Benini. CoRR, (2020)

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Disambiguation of "Rossi, Davide"

Please choose a person to relate this publication to

Davide Rossi

Davide Pennino

Davide Cadamuro

Davide Batic

Davide Pagani

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Rossi, Davide"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation.

Please choose a person to relate this publication to

Davide Rossi

Davide Pennino

Davide Cadamuro

Davide Batic

Davide Pagani

Other publications of authors with the same name

Disambiguation