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Operand size reconfiguration for big data processing in memory., , , , , and . DATE, page 710-715. IEEE, (2017)Extending Memory Capacity in Consumer Devices with Emerging Non-Volatile Memory: An Experimental Study., , , , , , , , , and 1 other author(s). CoRR, (2021)Casper: Accelerating Stencil Computation using Near-cache Processing., , , , , , and . CoRR, (2021)Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases., , , , and . ISVLSI, page 273-278. IEEE, (2022)Accelerating Neural Network Inference with Processing-in-DRAM: From the Edge to the Cloud., , , , and . CoRR, (2022)Benchmarking a New Paradigm: An Experimental Analysis of a Real Processing-in-Memory Architecture., , , , , and . CoRR, (2021)RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory., , , , , , , , , and 3 other author(s). CoRR, (2022)Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis., , , , , , , , , and . HPCA, page 280-296. IEEE, (2024)Employing classification-based algorithms for general-purpose approximate computing., , , , and . DAC, page 70:1-70:6. ACM, (2018)Data clustering for efficient approximate computing., , , , , , , , and . Des. Autom. Embed. Syst., 24 (1): 3-22 (2020)