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Ultralow-Power Compact Artificial Synapse Based on a Ferroelectric Fin Field-Effect Transistor for Spatiotemporal Information Processing.

Z. Zhang, G. Zhan, W. Gan, Y. Cheng, X. Zhang, Y. Peng, J. Tang, F. Zhang, J. Huo, G. Xu, Q. Zhang, Z. Wu, Y. Liu, H. Lv, Q. Liu, G. Han, H. Yin, J. Luo, and W. Wang. Adv. Intell. Syst., (November 2023)

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Zhang Zhang

Meng Zhang

Methods and implementations of road-network matchingM. Zhang. TU München, (2009)

Shuying Zhang

Yan Zhang

Gang Zhang

Other publications of authors with the same name

Memristive Crossbar Arrays for Storage and Computing Applications.H. Li, S. Wang, X. Zhang, W. Wang, R. Yang, Z. Sun, W. Feng, P. Lin, Z. Wang, L. Sun and 1 other author(s). Adv. Intell. Syst., 3 (9): 2170065 (2021)Pruning random resistive memory for optimizing analogue AI.Y. Li, S. Wang, Y. Zhao, S. Wang, W. Zhang, Y. He, N. Lin, B. Cui, X. Chen, S. Zhang and 10 other author(s). CoRR, (2023)Echo state graph neural networks with analogue random resistor arrays.S. Wang, Y. Li, D. Wang, W. Zhang, X. Chen, D. Dong, S. Wang, X. Zhang, P. Lin, C. Gallicchio and 6 other author(s). CoRR, (2021)Random resistive memory-based deep extreme point learning machine for unified visual processing.S. Wang, Y. Gao, Y. Li, W. Zhang, Y. Yu, B. Wang, N. Lin, H. Chen, Y. Zhang, Y. Jiang and 14 other author(s). CoRR, (2023)Multicore Spiking Neuromorphic Chip in 180-nm With ReRAM Synapses and Digital Neurons.H. Jiang, J. Lu, C. Zhang, S. Tang, J. An, L. Cheng, J. Lu, J. Wei, K. Zhou, X. Zhang and 2 other author(s). IEEE J. Emerg. Sel. Topics Circuits Syst., 13 (4): 975-985 (December 2023)A 28 nm 81 Kb 59-95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output.K. Zhou, X. Jia, C. Zhao, X. Zhang, G. Wu, C. Mu, H. Zhu, Y. Ding, C. Chen, X. Xue and 2 other author(s). IEEE J. Emerg. Sel. Topics Circuits Syst., 12 (4): 846-857 (2022)Resistive Memory-based Neural Differential Equation Solver for Score-based Diffusion Model.J. Yang, H. Chen, J. Chen, S. Wang, S. Wang, Y. Yu, X. Chen, B. Wang, X. Zhang, B. Cui and 13 other author(s). CoRR, (2024)A Scalable Area-Efficient Low-Delay Asynchronous AER Circuits Design for Neuromorphic Chips.S. Ouyang, K. Zhou, H. Jiang, C. Li, J. Liang, F. Zhu, X. Zhang, and Q. Liu. IEEE Trans. Circuits Syst. II Express Briefs, 71 (5): 2804-2808 (May 2024)Binary stochasticity enabled highly efficient neuromorphic deep learning achieves better-than-software accuracy.Y. Li, W. Wang, M. Wang, C. Dou, Z. Ma, H. Zhou, P. Zhang, N. Lepri, X. Zhang, Q. Luo and 6 other author(s). CoRR, (2023)Binary-Stochasticity-Enabled Highly Efficient Neuromorphic Deep Learning Achieves Better-than-Software Accuracy.Y. Li, W. Wang, M. Wang, C. Dou, Z. Ma, H. Zhou, P. Zhang, N. Lepri, X. Zhang, Q. Luo and 6 other author(s). Adv. Intell. Syst., (January 2024)

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Disambiguation of "Zhang, Xumeng"

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Ultralow-Power Compact Artificial Synapse Based on a Ferroelectric Fin Field-Effect Transistor for Spatiotemporal Information Processing.

Please choose a person to relate this publication to

Zhang Zhang

Meng Zhang

Shuying Zhang

Yan Zhang

Gang Zhang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zhang, Xumeng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Ultralow-Power Compact Artificial Synapse Based on a Ferroelectric Fin Field-Effect Transistor for Spatiotemporal Information Processing.

Please choose a person to relate this publication to

Zhang Zhang

Meng Zhang

Shuying Zhang

Yan Zhang

Gang Zhang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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Ultralow-Power Compact Artificial Synapse Based on a Ferroelectric Fin Field-Effect Transistor for Spatiotemporal Information Processing.