( en | de | ru )

 

Disambiguation of "Lai, Liyang"

Author of the publication

copydeleteadd this publication to your clipboard
Programmable Scan-Based Logic Built-In Self Test.

, , and . ATS, page 371-377. IEEE, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Liyang Hu

Mao Lai

Waltraud Lai

Eugen Lai

Xin Lai

 

Other publications of authors with the same name

Diagnosis and Layout Aware (DLA) Scan Chain Stitching., , , , , , , , , and 5 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 23 (3): 466-479 (2015)STDF Memory Fail Datalog Standard., , , , , , , , , and . VTS, page 209-214. IEEE Computer Society, (2009)Adaptive Multidimensional Parallel Fault Simulation Framework on Heterogeneous System., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (6): 1951-1964 (June 2023)Parallel Static Learning Toward Heterogeneous Computing Architectures., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (3): 983-993 (March 2024)Signature Based Diagnosis for Logic BIST., , , , and . ITC, page 1-9. IEEE Computer Society, (2006)Logic BIST with Scan Chain Segmentation., , , and . ITC, page 57-66. IEEE Computer Society, (2004)Detection and Diagnosis of Static Scan Cell Internal Defect., , , and . ITC, page 1-10. IEEE Computer Society, (2008)GPGPU-Based ATPG System: Myth or Reality?, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (1): 239-247 (2020)X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis., , , , , , , and . IEEE Des. Test Comput., 24 (5): 476-485 (2007)GPU-based Hybrid Parallel Logic Simulation for Scan Patterns., , , and . ITC-Asia, page 118-123. IEEE, (2020)