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A 6.6pJ/bit/iter radix-16 modified log-MAP decoder using two-stage ACS architecture.

, , , and . A-SSCC, page 313-316. IEEE, (2011)

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A 684Mbps 57mW joint QR decomposition and MIMO processor for 4×4 MIMO-OFDM systems., , , , and . A-SSCC, page 309-312. IEEE, (2011)A 6.6pJ/bit/iter radix-16 modified log-MAP decoder using two-stage ACS architecture., , , and . A-SSCC, page 313-316. IEEE, (2011)Low-complexity lattice reduction architecture using interpolation-based QR decomposition for MIMO-OFDM systems., , , and . APCCAS, page 224-227. IEEE, (2012)MIMO fingerprinting-based particle filter for mobile positioning systems., , , and . VLSI-DAT, page 1-4. IEEE, (2013)A classification-based elephant flow detection method using application round on SDN environments., , and . APNOMS, page 231-234. IEEE, (2017)A Noise-Robust Convex-Optimized Positioning System Based on Code-Aided RSS Estimation and Virtual Base Station Transform., , , and . J. Signal Process. Syst., 84 (3): 309-323 (2016)SNR Estimation Based on Metric Normalization Frequency in Viterbi Decoder., and . IEEE Communications Letters, 15 (6): 668-670 (2011)Multi-stage lattice-reduction-aided MIMO detector using reverse-order LLL algorithm., , , and . APCCAS, page 100-103. IEEE, (2010)Power-Saving 4 ˟ 4 Lattice-Reduction Processor for MIMO Detection With Redundancy Checking., and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (2): 95-99 (2011)A Low-Complexity Viterbi Decoder for Space-Time Trellis Codes., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (4): 873-885 (2010)