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Vertical Slit Field Effect Transistor in ultra-low power applications., , and . ISQED, page 384-390. IEEE, (2012)Boolean Functions Classification via Fixed Polarity Reed-Muller Forms., and . IEEE Trans. Computers, 46 (2): 173-186 (1997)AFD-based method for signal line EM reliability evaluation., and . ISQED, page 443-449. IEEE, (2016)Minimal Delay Interconnect Design Using Alphabetic Trees., and . DAC, page 392-396. ACM Press, (1994)Aggressor alignment for worst-case crosstalk noise., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (5): 612-621 (2001)The crossing distribution problem IC layout., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (4): 423-433 (1995)A new reasoning scheme for efficient redundancy addition and removal., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (7): 945-951 (2003)Eliminating false positives in crosstalk noise analysis., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (9): 1406-1419 (2005)Timing-Aware Power-Noise Reduction in Placement., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (3): 527-541 (2007)On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (2): 229-241 (2011)