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Disambiguation of "Geada, Joao"

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Transistor level gate modeling for accurate and fast timing, noise, and power analysis.

, , , and . DAC, page 456-461. ACM, (2008)

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Gil dos Santos Guerreiro João

Joao Alves

João Barros

João Fonseca

Joao Carreira

 

Other publications of authors with the same name

Silicon-correlated Simulation Methodology of EM Side-channel Leakage Analysis., , , , , , , , , and 1 other author(s). ACM J. Emerg. Technol. Comput. Syst., 19 (1): 9:1-9:23 (January 2023)Victim alignment in crosstalk aware timing analysis., , , , , and . ICCAD, page 698-704. IEEE Computer Society, (2007)Transistor level gate modeling for accurate and fast timing, noise, and power analysis., , , and . DAC, page 456-461. ACM, (2008)Dynamic Assertions Using TXP., , , and . RV@CAV, volume 55 of Electronic Notes in Theoretical Computer Science, page 134-146. Elsevier, (2001)Applying Machine Learning to Design for Reliability Coverage., , , , , , , , , and 4 other author(s). IRPS, page 1-7. IEEE, (2019)A study of mixed mode test pattern generation methods.. Newcastle University, Newcastle upon Tyne, UK, (1991)British Library, EThOS.