Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Low power finite state machine synthesis using power-gating., , and . Integr., 44 (3): 175-184 (2011)Hybrid Approach of Within-Clock Power Gating and Normal Power Gating to Reduce Power., , and . J. Circuits Syst. Comput., 25 (5): 1650044:1-1650044:26 (2016)Design of Power Gated SRAM Cell for Reducing the NBTI Effect and Leakage Power Dissipation During the Hold Operation., , , and . J. Electron. Test., 38 (1): 91-105 (2022)An efficient hardware realization of EMD for real-time signal processing applications., and . Int. J. Circuit Theory Appl., 48 (12): 2202-2218 (2020)Shared reduced ordered binary decision diagram-based thermal-aware network synthesis., , and . Int. J. Circuit Theory Appl., 50 (6): 2271-2286 (2022)Field-programmable gate array-based design for real-time computation of ensemble empirical mode decomposition., and . Int. J. Circuit Theory Appl., 49 (8): 2312-2328 (2021)Three-level AND-OR-XOR network synthesis: A GA based approach., , and . APCCAS, page 574-577. IEEE, (2008)Design and analysis of a low power strategy in finite state machines implemented in configurable logic blocks., , and . Int. J. Embed. Syst., 15 (4): 326-332 (2022)An Approach for Low Power Design of Power Gated Finite State Machines Considering Partitioning and State Encoding Together., and . J. Low Power Electron., 8 (4): 452-463 (2012)An Elitist Non-Dominated Multi-Objective Genetic Algorithm Based Temperature Aware Circuit Synthesis., and . Int. J. Interact. Multim. Artif. Intell., 6 (4): 26-38 (2020)