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Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (4): 1186-1190 (2022)

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A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures., , , , , , , , , and 16 other author(s). CoRR, (2023)Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool., , , and . DAC, page 254-260. ACM Press, (1995)Solving the State Assignment Problem for Signal Transition Graphs., , , and . DAC, page 568-572. IEEE Computer Society Press, (1992)Testing redundant asynchronous circuits by variable phase splitting., , and . EURO-DAC, page 328-333. IEEE Computer Society, (1994)Design of Asynchronous Controllers with Delay Insensitive Interface., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (12): 2577-2585 (2002)Virtual Platform-Based Design Space Exploration of Power-Efficient Distributed Embedded Applications., , , , , , , and . ACM Trans. Embed. Comput. Syst., 14 (3): 49:1-49:25 (2015)A software development tool chain for a reconfigurable processor., , and . CASES, page 93-98. ACM, (2001)Enabling adaptability through elastic clocks., , and . DAC, page 8-10. ACM, (2009)A Fully-Automated Desynchronization Flow for Synchronous Circuits., , , and . DAC, page 982-985. IEEE, (2007)Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis., , , and . IEEE Access, (2017)