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NECoBus: a high-end SOC bus with a portable and low-latency wrapper-based interface mechanism.

, , , , , and . CICC, page 315-318. IEEE, (2002)

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Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array., , , , , and . EUC, volume 3207 of Lecture Notes in Computer Science, page 301-311. Springer, (2004)Reducing the Configuration Loading Time of a Coarse Grain Multicontext Reconfigurable Device., , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 171-180. Springer, (2003)NECoBus: a high-end SOC bus with a portable and low-latency wrapper-based interface mechanism., , , , , and . CICC, page 315-318. IEEE, (2002)Stream applications on the dynamically reconfigurable processor., , , , , , , , , and 1 other author(s). FPT, page 137-144. IEEE, (2004)The RDT network router chip., , , , and . ASP-DAC, page 675-676. IEEE, (1997)An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor., , , , , and . FPT, page 163-170. IEEE, (2005)A Simple Data Transfer Technique Using Local Address for Networks-on-Chips., , , , and . IEEE Trans. Parallel Distributed Syst., 17 (12): 1425-1437 (2006)Wrapper-based bus implementation techniques for performance improvement and cost reduction., , and . IEEE J. Solid State Circuits, 39 (5): 804-817 (2004)Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor., , , , , and . ARCS Workshops, page 12-18. VDE Verlag, (2005)A Dynamically Adaptive Switching Fabric on a Multicontext Reconfigurable Device., , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 161-170. Springer, (2003)