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Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.

Y. Yang, J. Park, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2748-2752 (2015)

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Seung-Chul Tae

Gi-Chul Song

Song Song

Rajani Chulyadyo

Other publications of authors with the same name

Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology.Y. Yang, H. Jeong, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (7): 1023-1032 (2016)Transistor-interconnect mobile system-on-chip co-design method for holistic battery energy minimization.N. Mojumder, S. Song, K. Rim, J. Xu, J. Wang, J. Zhu, M. Vratonjic, K. Lin, M. Saint-Laurent, P. Bassett and 1 other author(s). VLSIC, page 84-. IEEE, (2015)Sense-Amplifier-Based Flip-Flop With Transition Completion Detection for Low-Voltage Operation.H. Jeong, T. Oh, S. Song, and S. Jung. IEEE Trans. Very Large Scale Integr. Syst., 26 (4): 609-620 (2018)Self-Timed Pulsed Latch for Low-Voltage Operation With Reduced Hold Time.H. Jeong, J. Park, S. Song, and S. Jung. IEEE J. Solid State Circuits, 54 (8): 2304-2315 (2019)Holistic technology optimization and key enablers for 7nm mobile SoC.S. Song, J. Xu, N. Mojumder, K. Rim, D. Yang, J. Bao, J. Zhu, J. Wang, M. Badaroglu, V. Machkaoutsan and 4 other author(s). VLSIC, page 198-. IEEE, (2015)Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes.S. Song, J. Xu, D. Yang, K. Rim, P. Feng, J. Bao, J. Zhu, J. Wang, G. Nallapati, M. Badaroglu and 4 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)PPAC scaling enablement for 5nm mobile SoC technology.M. Badaroglu, J. Xu, J. Zhu, D. Yang, J. Bao, S. Song, P. Feng, R. Ritzenthaler, H. Mertens, G. Eneman and 7 other author(s). ESSDERC, page 240-243. IEEE, (2017)FinFET based SRAM bitcell design for 32 nm node and below.S. Song, M. Abu-Rahma, and G. Yeap. Microelectron. J., 42 (3): 520-526 (2011)Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.Y. Yang, J. Park, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2748-2752 (2015)SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.Y. Yang, J. Park, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1538-1545 (2015)

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Disambiguation of "Song, Seung Chul"

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Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.

Please choose a person to relate this publication to

Seung-Chul Tae

Gi-Chul Song

Song Song

Song Song

Rajani Chulyadyo

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Song, Seung Chul"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.

Please choose a person to relate this publication to

Seung-Chul Tae

Gi-Chul Song

Song Song

Song Song

Rajani Chulyadyo

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
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Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.