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AutoCC: Automatic Discovery of Covert Channels in Time-Shared Hardware., , , , , , and . MICRO, page 871-885. ACM, (2023)Microarchitectural Timing Channels and their Prevention on an Open-Source 64-bit RISC-V Core., , , , and . DATE, page 627-632. IEEE, (2021)A Heterogeneous RISC-V based SoC for Secure Nano-UAV Navigation., , , , , , , , , and 5 other author(s). CoRR, (2024)Systematic Prevention of On-Core Timing Channels by Full Temporal Partitioning., , , , and . IEEE Trans. Computers, 72 (5): 1420-1430 (May 2023)Systematic Prevention of On-Core Timing Channels by Full Temporal Partitioning., , , , and . CoRR, (2022)On-Demand Redundancy Grouping: Selectable Soft-Error Tolerance for a Multicore Cluster., , , , and . ISVLSI, page 398-401. IEEE, (2022)Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs., , , , , , , , , and 8 other author(s). HCS, page 1-12. IEEE, (2023)Towards a RISC-V Open Platform for Next-generation Automotive ECUs., , , , , , , and . MECO, page 1-8. IEEE, (2023)A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design., , , , , and . ASAP, page 43-51. IEEE, (2022)Proving the Absence of Microarchitectural Timing Channels., , , , , , and . CoRR, (2023)