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FPGA Implementation of N-BEATS for Time Series Forecasting Using Block Minifloat Arithmetic.

W. Zhou, H. Qi, D. Boland, and P. Leong. APCCAS, page 546-550. IEEE, (2022)

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David Boland

Wilhelm Boland

Gerda Boland

Tobias Boland

Other publications of authors with the same name

AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers.J. Faraone, M. Kumm, M. Hardieck, P. Zipf, X. Liu, D. Boland, and P. Leong. IEEE Trans. Very Large Scale Integr. Syst., 28 (1): 115-128 (2020)Derivation of Respiratory Metrics in Health and Asthma.J. Prinable, P. Jones, D. Boland, A. McEwan, and C. Thamrin. Sensors, 20 (24): 7134 (2020)ENCORE: Efficient Architecture Verification Framework with FPGA Acceleration.K. Shi, S. Xu, Y. Diao, D. Boland, and Y. Bao. FPGA, page 209-219. ACM, (2023)Simultaneous Inference and Training Using On-FPGA Weight Perturbation Techniques.Siddhartha, S. Wilton, D. Boland, B. Flower, P. Blackmore, and P. Leong. FPT, page 306-309. IEEE, (2018)Long Short-Term Memory for Radio Frequency Spectral Prediction and its Real-Time FPGA Implementation.Siddhartha, Y. Lee, D. Moss, J. Faraone, P. Blackmore, D. Salmond, D. Boland, and P. Leong. MILCOM, page 1-9. IEEE, (2018)MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency.S. Rasoulinezhad, S. Fox, H. Zhou, L. Wang, D. Boland, and P. Leong. FPT, page 339-342. IEEE, (2019)LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations.S. Rasoulinezhad, Siddhartha, H. Zhou, L. Wang, D. Boland, and P. Leong. FPGA, page 161-171. ACM, (2020)AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers.J. Faraone, M. Kumm, M. Hardieck, P. Zipf, X. Liu, D. Boland, and P. Leong. CoRR, (2019)Unrolling Ternary Neural Networks.S. Tridgell, M. Kumm, M. Hardieck, D. Boland, D. Moss, P. Zipf, and P. Leong. ACM Trans. Reconfigurable Technol. Syst., 12 (4): 22:1-22:23 (2019)Real-Time Automatic Modulation Classification.S. Tridgell, D. Boland, P. Leong, and Siddhartha. FPT, page 299-302. IEEE, (2019)

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Disambiguation of "Boland, David"

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FPGA Implementation of N-BEATS for Time Series Forecasting Using Block Minifloat Arithmetic.

Please choose a person to relate this publication to

David Boland

Wilhelm Boland

Wilhelm Boland

Gerda Boland

Tobias Boland

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Boland, David"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML FPGA Implementation of N-BEATS for Time Series Forecasting Using Block Minifloat Arithmetic.

Please choose a person to relate this publication to

David Boland

Wilhelm Boland

Wilhelm Boland

Gerda Boland

Tobias Boland

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

FPGA Implementation of N-BEATS for Time Series Forecasting Using Block Minifloat Arithmetic.