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Design of a low power GPS receiver in 0.18 µm CMOS technology with a SigmaDeltafractional-N synthesizer.

D. Li, Y. Yang, J. an Wang, B. Li, Q. Long, J. Wei, N. di Wang, L. Wang, Q. Liu, and D. long Zhang. J. Zhejiang Univ. Sci. C, 11 (6): 444-449 (2010)

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Yang Yang

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SMONoC: Optical network-on-chip using a statistical multiplexing strategy.K. Wang, S. Qi, Z. Chen, Y. Yang, and H. Gu. Opt. Switch. Netw., (2019)A 0.45-V, 14.6-nW CMOS Subthreshold Voltage Reference With No Resistors and No BJTs.Y. Wang, Z. Zhu, J. Yao, and Y. Yang. IEEE Trans. Circuits Syst. II Express Briefs, 62-II (7): 621-625 (2015)RSEL: revocable secure efficient lightweight RFID authentication scheme.K. Fan, J. Li, H. Li, X. Liang, X. Shen, and Y. Yang. Concurr. Comput. Pract. Exp., 26 (5): 1084-1096 (2014)A High Speed Low Power latched Comparator for SHA-Less Pipelined ADC.L. Zhao, Y. Yang, and Z. Zhu. Journal of Circuits, Systems, and Computers, (2013)A 1.8V 100MS/s 10-bit pipelined folding A/D converter with 9.49 ENOB at Nyquist frequency.X. Li, Y. Yang, and Z. Zhu. ASICON, page 476-479. IEEE, (2011)A Multi-Output on-Chip Switched-Capacitor DC-DC Converter with Unequal Flying Capacitors for Different Power Modes.Y. Yang, Y. Zhao, and G. Dong. Journal of Circuits, Systems, and Computers, 24 (4): 1550051:1-1550051:18 (2015)A Dual Band RF Energy Harvester with Hybrid Threshold Voltage Self-Compensation.L. Liu, W. Yuan, J. Mu, Z. Zhu, and Y. Yang. Journal of Circuits, Systems, and Computers, 25 (6): 1650055:1-1650055:16 (2016)A Power-Enhanced Active Rectifier with Offset-Controlled Comparator for Self-Powered PEH Systems.L. Liu, Y. Pang, X. Liao, Z. Zhu, and Y. Yang. Journal of Circuits, Systems, and Computers, 27 (5): 1850079:1-1850079:17 (2018)A 15-MHz bandwidth double sampling MASH25b-15b sigma-delta modulator with DEM for multibit DACs.D. Li, C. Fei, Q. Zhang, Y. Li, X. Wu, and Y. Yang. I. J. Circuit Theory and Applications, 47 (10): 1555-1567 (2019)RingCube - An incrementally scale-out optical interconnect for cloud computing data center.X. Yu, H. Gu, Y. Yang, and K. Wang. Future Gener. Comput. Syst., (2016)

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Disambiguation of "Yang, Yintang"

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Design of a low power GPS receiver in 0.18 µm CMOS technology with a SigmaDeltafractional-N synthesizer.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yang, Yintang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Design of a low power GPS receiver in 0.18 µm CMOS technology with a SigmaDeltafractional-N synthesizer.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
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APA
Chicago
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Design of a low power GPS receiver in 0.18 µm CMOS technology with a SigmaDeltafractional-N synthesizer.