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Time and Fairness in a Process Algebra with Non-blocking Reading.

, , и . SOFSEM, том 5404 из Lecture Notes in Computer Science, стр. 193-204. Springer, (2009)

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Walter Vogler

Walter Vogler

Walter Vogler

Walter Vogler

Nils Walter Vogler

 

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Decomposition in Asynchronous Circuit Design., и . FSTTCS, том 2556 из Lecture Notes in Computer Science, стр. 336-347. Springer, (2002)Failures Semantics and Deadlocking of Modular Petri Nets.. MFCS, том 324 из Lecture Notes in Computer Science, стр. 542-551. Springer, (1988)Modal Interface Automata., и . IFIP TCS, том 7604 из Lecture Notes in Computer Science, стр. 265-279. Springer, (2012)A generalization of trace theory. Forschungsberichte, TU Munich, (1990)Bisimulation and action refinement. Forschungsberichte, TU Munich, (1990)Fairness and Partial Order Semantics.. Inf. Process. Lett., 55 (1): 33-39 (1995)ACTL for Modal Interface Automata., и . Theor. Comput. Sci., (2017)A Short STory on Action Refinement.. Foundations of Computer Science: Potential - Theory - Cognition, том 1337 из Lecture Notes in Computer Science, стр. 271-278. Springer, (1997)Ready Simulation for Concurrency: It's Logical!, и . ICALP, том 4596 из Lecture Notes in Computer Science, стр. 752-763. Springer, (2007)Relating Fairness and Timing in Process Algebras., , и . CONCUR, том 2761 из Lecture Notes in Computer Science, стр. 438-452. Springer, (2003)