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Disambiguation of "Rolandi, Pier Luigi"

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3D Capacitive Interconnections for High Speed Interchip Communication.

, , , , , , , , and . CICC, page 1-8. IEEE, (2007)

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Waltraud Pier

Waltraud Pier

Arnold Pier

Luigi Busarello

Luigi Nardi

 

Other publications of authors with the same name

Analog sense amplifiers for high density NOR flash memories., , , , , , and . CICC, page 247-250. IEEE, (1999)A 1.2-to-8V Charge-Pump with Improved Power Efficiency for Non-Volatille Memories., , , , and . ISSCC, page 522-619. IEEE, (2007)Power efficient charge pump in deep submicron standard CMOS technology., , , , and . IEEE J. Solid State Circuits, 38 (6): 1068-1071 (2003)A dynamically adaptive DSP for heterogeneous reconfigurable platforms., , , , , , , , and . DATE, page 9-14. EDA Consortium, San Jose, CA, USA, (2007)3D Capacitive Interconnections with Mono- and Bi-Directional Capabilities., , , , , , , and . ISSCC, page 356-608. IEEE, (2007)Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors., , , , , , , and . ISLPD, page 203-208. ACM, (1995)System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface., , , , , , and . CICC, page 463-466. IEEE, (2009)3-D Capacitive Interconnections With Mono- and Bi-Directional Capabilities., , , , , , , and . IEEE J. Solid State Circuits, 43 (1): 275-284 (2008)Words Recognition using Associative Memory., , , , , and . ICDAR, page 97-101. IEEE Computer Society, (1997)Yield prediction for 3D capacitive interconnections., , , , , , , and . ICCAD, page 809-814. ACM, (2006)