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Disambiguation of "Wei, Gu-Yeon"

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SODA: a New Synthesis Infrastructure for Agile Hardware Design of Machine Learning Accelerators.

, , , , , , , and . ICCAD, page 98:1-98:7. IEEE, (2020)

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Wei Gu

Wei Gu

Sang-Chun Yeon

Yeon Ha

Wei Wei

 

Other publications of authors with the same name

A case for efficient accelerator design space exploration via Bayesian optimization., , , , , , and . ISLPED, page 1-6. IEEE, (2017)Evaluation of voltage stacking for near-threshold multicore computing., , and . ISLPED, page 373-378. ACM, (2012)Towards a software approach to mitigate voltage emergencies., , , , and . ISLPED, page 123-128. ACM, (2007)The HELIX project: overview and directions., , , , and . DAC, page 277-282. ACM, (2012)Structured Compression by Unstructured Pruning for Sparse Quantized Neural Networks., , , , , and . CoRR, (2019)Network Pruning for Low-Rank Binary Indexing., , , , and . CoRR, (2019)Ivory: Early-Stage Design Space Exploration Tool for Integrated Voltage Regulators., , , , , , , and . DAC, page 1:1-1:6. ACM, (2017)Assisting High-Level Synthesis Improve SpMV Benchmark Through Dynamic Dependence Analysis., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (10): 1440-1444 (2018)DNN Engine: A 28-nm Timing-Error Tolerant Sparse Deep Neural Network Processor for IoT Applications., , , and . IEEE J. Solid State Circuits, 53 (9): 2722-2731 (2018)An 8×5 Gb/s Parallel Receiver With Collaborative Timing Recovery., , , and . IEEE J. Solid State Circuits, 44 (11): 3120-3130 (2009)