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Disambiguation of "Paul, Bipul C."

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Statistical timing analysis using levelized covariance propagation considering systematic and random variations of process parameters.

, , and . ACM Trans. Design Autom. Electr. Syst., 11 (4): 848-879 (2006)

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Bipul Sen

Paul C Shields

C L Paul Trüb

Guido C C Clinckspoor

Thomas C C Knöbig

 

Other publications of authors with the same name

A Retrospective View on the Technology Evolution to Support Low Power Mobile Application., , , , , , and . J. Low Power Electron., 14 (3): 374-392 (2018)Modeling and analysis of circuit performance of ballistic CNFET., , , and . DAC, page 717-722. ACM, (2006)Advances in nanoelectronics circuits and systems Editorial., and . IET Comput. Digit. Tech., 3 (6): 551-552 (2009)Introduction to the special issue on memory technologies., and . JETC, 9 (2): 10:1-10:2 (2013)Digital Subthreshold for Ultra-Low Power Operation: Prospects and Challenges., and . Low-Power Variation-Tolerant Design in Nanometer Silicon, Springer, (2011)Process variation in nano-scale memories: failure analysis and process tolerant architecture., , and . CICC, page 353-356. IEEE, (2004)ROM-Based Logic (RBL) Design: A Low-Power 16 Bit Multiplier., , and . IEEE J. Solid State Circuits, 44 (11): 2935-2942 (2009)Statistical timing analysis using levelized covariance propagation considering systematic and random variations of process parameters., , and . ACM Trans. Design Autom. Electr. Syst., 11 (4): 848-879 (2006)Prospect of ballistic CNFET in high performance applications: Modeling and analysis., , , and . JETC, 3 (3): 12 (2007)Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory., , , , , , , , , and 47 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 27 (2): 253-280 (2019)