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Disambiguation of "Matsukawa, Takashi"

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A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology.

, , , , , , , , , , , and . IEICE Trans. Electron., 95-C (4): 686-695 (2012)

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Takashi Seki

Minoru Matsukawa

Takashi Iwata

Takashi Numaguchi

Takashi Tsuno

 

Other publications of authors with the same name

Independent-Double-Gate FinFET SRAM Technology., , , , and . IEICE Trans. Electron., 96-C (4): 413-423 (2013)Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on tunnel FET performance., , , , , , , , , and 1 other author(s). ESSDERC, page 182-185. IEEE, (2014)PBTI for N-type tunnel FinFETs., , , , , , , , , and 4 other author(s). ICICDT, page 1-4. IEEE, (2015)A 0.3-V 1-µW Super-Regenerative Ultrasound Wake-Up Receiver With Power Scalability., , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (9): 1027-1031 (2017)Realization of 0.7-V analog circuits by adaptive-Vt operation of FinFET., , , , , , , , , and 1 other author(s). CICC, page 1-4. IEEE, (2010)High-Frequency Precise Characterization of Intrinsic FinFET Channel., , , , , , , , , and 3 other author(s). IEICE Trans. Electron., 95-C (4): 752-760 (2012)Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes., , , , , , , , , and 5 other author(s). ESSDERC, page 202-205. IEEE, (2013)Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration., , , , , , , , , and 1 other author(s). ESSDERC, page 278-281. IEEE, (2014)Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology., , , , , , , , and . CICC, page 33-36. IEEE, (2007)Image-Classifier Deep Convolutional Neural Network Training by 9-bit Dedicated Hardware to Realize Validation Accuracy and Energy Efficiency Superior to the Half Precision Floating Point Format., , , , , , and . ISCAS, page 1-5. IEEE, (2018)