Author of the publication

FPU Generator for Design Space Exploration.

, , , , , and . IEEE Symposium on Computer Arithmetic, page 25-34. IEEE Computer Society, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Building Conflict-Free FFT Schedules., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (4): 1146-1155 (2015)Avoiding game over: bringing design to the next level., , , , , , , , , and . DAC, page 623-629. ACM, (2012)Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor., , , , , , , , , and 33 other author(s). ISCAS, page 443-447. IEEE, (2022)Cyclebite: Extracting Task Graphs From Unstructured Compute-Programs., , , , , and . IEEE Trans. Computers, 73 (1): 221-234 (January 2024)Hardware implementation of micropolygon rasterization with motion and defocus blur., , and . High Performance Graphics, page 1-9. Eurographics Association, (2010)Efficient Error Detection for Matrix Multiplication With Systolic Arrays on FPGAs., , and . IEEE Trans. Computers, 72 (8): 2390-2403 (August 2023)Automated Parallel Kernel Extraction from Dynamic Application Traces., , and . CoRR, (2020)Itemization and Track Limitations of Fan-Out-Free Functions for Static CMOS Functional Cells., , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (7): 1164-1168 (2019)Physically Unclonable Functions Using Foundry SRAM Cells., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (3): 955-966 (2019)Profile-Guided Parallel Task Extraction and Execution for Domain Specific Heterogeneous SoC., , , , , , and . ISPA/BDCloud/SocialCom/SustainCom, page 913-920. IEEE, (2022)