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Disambiguation of "Shibata, Hajime"

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A 9-GS/s 1.125-GHz BW Oversampling Continuous-Time Pipeline ADC Achieving -164-dBFS/Hz NSD.

, , , , , , , , and . IEEE J. Solid State Circuits, 52 (12): 3219-3234 (2017)

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Hajime Sakai

Daisuke Shibata

Tomohiro Shibata

Hajime Konno

Hajime Myoken

 

Other publications of authors with the same name

15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS., , , , , , , , , and . ISSCC, page 278-279. IEEE, (2016)Measurement System for Switching Current Distribution in Intrinsic Josephson Junctions., , , , and . IEICE Trans. Electron., 90-C (3): 605-606 (2007)A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers., , , and . IEEE J. Solid State Circuits, 53 (3): 681-691 (2018)A -89-dBc IMD3 DAC Sub-System in a 465-MHz BW CT Delta-Sigma ADC Using a Power and Area Efficient Calibration Technique., , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (7): 859-863 (2018)A 375mW Quadrature Bandpass ΔΣ ADC with 90dB DR and 8.5MHz BW at 44MHz., , , , , and . ISSCC, page 141-150. IEEE, (2006)A 100mW 10MHz-BW CT ΔΣ Modulator with 87dB DR and 91dBc IMD., , , , , , and . ISSCC, page 498-499. IEEE, (2008)Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS., , , , , , , , , and . CICC, page 1-4. IEEE, (2017)A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f0 = 450 MHz Using 550 mW., , , , , , , and . IEEE J. Solid State Circuits, 47 (12): 2888-2897 (2012)Automated Design of Analog Circuits Using a Cell-Based Structure., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 86-A (2): 364-370 (2003)Frequency Response Analysis of Latch Utilized in High-Speed Comparator., , , and . ICECS, page 1077-1080. IEEE, (2006)