( en | de | ru )

 

Disambiguation of "Kuh, Ernest S."

Author of the publication

copydeleteadd this publication to your clipboard
Basic Circuit Theory

, and . Tate McGrawHill, New Delhi, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Wilhelm Kuh

Willi Kuh

Ernest Koch

Ernest Boles

Ernest Molua

 

Other publications of authors with the same name

SWEC: a Step Wise Equivalent Conductance timing simulator for CMOS VLSI circuits., , and . EURO-DAC, page 142-148. EEE Computer Society, (1991)TIGER: an efficient timing-driven global router for gate array and standard cell layout design., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (11): 1323-1331 (1997)Glitter: A Gridless Variable-Width Channel Router., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 5 (4): 459-465 (1986)Performance-Driven Steiner Tree Algorithm for Global Routing., , , , and . DAC, page 177-181. ACM Press, (1993)A Dynamic and Efficient Representation of Building-Block Layout., , and . DAC, page 376-384. IEEE Computer Society Press / ACM, (1987)Basic Circuit Theory, and . Tate McGrawHill, New Delhi, (2010)Routing Region Definition and Ordering Scheme for Building-Block Layout., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 4 (3): 189-197 (1985)Simultaneous Floor Planning and Global Routing for Hierarchical Building-Block Layout., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (5): 828-837 (1987)Recent advances in VLSI layout., and . Proc. IEEE, 78 (2): 237-263 (1990)Post global routing crosstalk synthesis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (12): 1418-1430 (1997)