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Disambiguation of "Muljono, Harry"

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A Dual-Core Multi-Threaded Xeon Processor with 16MB L3 Cache.

, , , , and . ISSCC, page 315-324. IEEE, (2006)

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Muljono

Muljono Soerowidjojo

Walther Harry

Tjoe Muljono

Klaus-Peter Harry

 

Other publications of authors with the same name

A 1.5-GHz 130-nm Itanium® 2 Processor with 6-MB on-die L3 cache., , , , , and . IEEE J. Solid State Circuits, 38 (11): 1887-1895 (2003)Itanium 2 Processor 6M: Higher Frequency and Larger L3 Cache., , and . IEEE Micro, 24 (2): 10-18 (2004)Power reduction techniques for an 8-core xeon® processor., , , , , , , , , and . ESSCIRC, page 340-343. IEEE, (2009)A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 42 (1): 17-25 (2007)A 45nm 8-core enterprise Xeon® processor., , , , , , , , and . ISSCC, page 56-57. IEEE, (2009)A 2.666GT/s 128GB/s 14nm Memory I/O with Jitter and Crosstalk Cancellation., , , , , , and . A-SSCC, page 21-24. IEEE, (2019)ItaniumTM Processor system bus design., , and . IEEE J. Solid State Circuits, 36 (10): 1565-1573 (2001)A 400-MT/s 6.4-GB/s multiprocessor bus interface., , , , , , , and . IEEE J. Solid State Circuits, 38 (11): 1846-1856 (2003)AC IO Loopback Design for High Speed µProcessor IO Test., , , , , , , , and . ITC, page 23-30. IEEE Computer Society, (2004)SkyLake-SP: A 14nm 28-Core xeon® processor., , , , , , , , , and 2 other author(s). ISSCC, page 34-36. IEEE, (2018)