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Hardware-based fast exploration of cache hierarchies in application specific MPSoCs., , , and . DATE, page 1-6. European Design and Automation Association, (2014)QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks., , , , and . CASES, page 21-30. IEEE, (2015)Pipelined Multiprocessor System-on-Chip for Multimedia., and . Springer, (2014)XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs., , and . DAC, page 22:1-22:10. ACM, (2013)IMPRES: integrated monitoring for processor reliability and security., and . DAC, page 502-505. ACM, (2006)Improving tag generation for memory data authentication in embedded processor systems., , , and . ASP-DAC, page 50-55. IEEE, (2016)Unrolling Loops With Indeterminate Loop Counts in System Level Pipelines., and . ASP-DAC, page 99-104. IEEE, (1998)Custom Floating-Point Unit Generation for Embedded Systems., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (5): 638-650 (2009)Pairwise alignment of nucleotide sequences using maximal exact matches., , , and . BMC Bioinform., 20 (1): 261:1-261:15 (2019)Switchable cache: utilising dark silicon for application specific cache optimisations., , , and . IET Comput. Digit. Tech., 10 (4): 157-164 (2016)