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Stochastic Optimization Approach to Transistor Sizing for CMOS VLSI Circuits.

, , and . DAC, page 36-40. ACM Press, (1994)

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Energy consumption modeling and optimization for SRAM's., and . IEEE J. Solid State Circuits, 30 (5): 571-579 (May 1995)Tools to Aid in Wiring Rule Generation for High Speed Interconnects., , , , , and . DAC, page 466-471. IEEE Computer Society Press, (1992)Design automation for a 3DIC FFT processor for synthetic aperture radar: a case study., , and . DAC, page 51-56. ACM, (2009)Hardware Implementation of Hierarchical Temporal Memory Algorithm., , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (1): 17:1-17:23 (2022)A Scalable Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm., , , , and . ACM J. Emerg. Technol. Comput. Syst., 17 (4): 52:1-52:29 (2021)Low power interconnect design for fpgas with bidirectional wiring using nanocrystal floating gate devices (abstract only)., , , and . FPGA, page 277. ACM, (2011)Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs., , and . DAC, page 381-387. ACM Press, (1995)Molecular electronics: from devices and interconnect to circuits and architecture., , , , and . Proc. IEEE, 91 (11): 1940-1957 (2003)A robust calibration and supervised machine learning reliability framework for digitally-assisted self-healing RFICs., , and . MWSCAS, page 1138-1141. IEEE, (2017)Flexible Low Power Probability Density Estimation Unit For Speech Recognition., , and . ISCAS, page 1117-1120. IEEE, (2007)