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Disambiguation of "Chun, Ki Chul"

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A 3T Gain Cell Embedded DRAM Utilizing Preferential Boosting for High Density and Low Power On-Die Caches.

, , , and . IEEE J. Solid State Circuits, 46 (6): 1495-1505 (2011)

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Chul Chun

Ki-Chul Choi

Rajani Chulyadyo

Evgueni Chulkov

Chulaporn Kamnerdpetch

 

Other publications of authors with the same name

A logic-compatible embedded flash memory featuring a multi-story high voltage switch and a selective refresh scheme., , and . VLSIC, page 130-131. IEEE, (2012)Charge-transferred presensing, negatively precharged word-line, and temperature-insensitive power-up schemes for low-voltage DRAMs., , and . IEEE J. Solid State Circuits, 39 (4): 694-703 (2004)A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process., , , , , , , , , and 37 other author(s). ISSCC, page 206-208. IEEE, (2018)Variation aware performance analysis of gain cell embedded DRAMs., , and . ISLPED, page 19-24. ACM, (2010)A Write-Back-Free 2T1D Embedded DRAM With Local Voltage Sensing and a Dual-Row-Access Low Power Mode., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (8): 2030-2038 (2013)A Bit-by-Bit Re-Writable Eflash in a Generic 65 nm Logic Process for Moderate-Density Nonvolatile Memory Applications., , and . IEEE J. Solid State Circuits, 49 (8): 1861-1871 (2014)A 1.8-V 128-Mb mobile DRAM with double boosting pump, hybrid current sense amplifier, and dual-referenced adjustment scheme for temperature sensor., , , , , , , , and . IEEE J. Solid State Circuits, 38 (4): 631-640 (2003)A 3T Gain Cell Embedded DRAM Utilizing Preferential Boosting for High Density and Low Power On-Die Caches., , , and . IEEE J. Solid State Circuits, 46 (6): 1495-1505 (2011)A bit-by-bit re-writable Eflash in a generic logic process for moderate-density embedded non-volatile memory applications., , and . CICC, page 1-4. IEEE, (2013)A 2T1C Embedded DRAM Macro With No Boosted Supplies Featuring a 7T SRAM Based Repair and a Cell Storage Monitor., , , and . IEEE J. Solid State Circuits, 47 (10): 2517-2526 (2012)