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Hardware Implementation of the SHA-3 Candidate Skein.

. IACR Cryptology ePrint Archive, (2009)

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Barbara Tillich

Peggy Tillich

Daniel Tillich

Thomas Tillich

Michael Tillich

 

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VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-Bit Processors., и . WAIFI, том 4547 из Lecture Notes in Computer Science, стр. 40-54. Springer, (2007)Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors., и . CHES, том 4249 из Lecture Notes in Computer Science, стр. 270-284. Springer, (2006)Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box., , и . SAMOS, том 4017 из Lecture Notes in Computer Science, стр. 457-466. Springer, (2006)Architectural Enhancements to Support Digital Signal Processing and Public-Key Cryptography., , и . WISES, стр. 129-143. Graz University of Technology, (2004)Hardware Implementation of the SHA-3 Candidate Skein.. IACR Cryptology ePrint Archive, (2009)High-Speed Hardware Implementations of BLAKE, Blue Midnight Wish, CubeHash, ECHO, Fugue, Gröstl, Hamsi, JH, Keccak, Luffa, Shabal, SHAvite-3, SIMD, and Skein., , , , , и . IACR Cryptology ePrint Archive, (2009)Compact Hardware Implementations of the SHA-3 Candidates ARIRANG, BLAKE, Gröstl, and Skein., , , , , , , , , и . IACR Cryptology ePrint Archive, (2009)Energy-Efficient Software Implementation of Long Integer Modular Arithmetic., , , и . CHES, том 3659 из Lecture Notes in Computer Science, стр. 75-90. Springer, (2005)The energy cost of cryptographic key establishment in wireless sensor networks., , и . AsiaCCS, стр. 380-382. ACM, (2007)SCA-resistant embedded processors: the next generation., , и . ACSAC, стр. 211-220. ACM, (2010)