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Exploiting an infrastructure-intellectual property for systems-on-chip test, diagnosis and silicon debug.

, , , and . IET Comput. Digit. Tech., 4 (2): 104-113 (2010)

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A new BIST architecture for low power circuits., , , and . ETW, page 160-164. IEEE Computer Society, (1999)GALLO: a genetic algorithm for floorplan area optimization., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (8): 943-951 (1996)Mixed public and secret-key cryptography for wireless sensor networks., , and . ICMU, page 1-6. IEEE, (2017)Initializability analysis of synchronous sequential circuits., , , , and . ACM Trans. Design Autom. Electr. Syst., 7 (2): 249-264 (2002)EXFI: a low-cost fault injection system for embedded microprocessor-based boards., , , and . ACM Trans. Design Autom. Electr. Syst., 3 (4): 626-634 (1998)Hierarchical Key Negotiation Technique for Transitory Master Key Schemes in Wireless Sensor Networks., , and . BWCCA, page 151-157. IEEE, (2013)A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques., , , , , , and . J. Electron. Test., 20 (1): 79-87 (2004)Polynomial classification model for real-time fall prediction system., , , , , and . COMPSAC (1), page 973-978. IEEE Computer Society, (2017)Random key pre-distribution with transitory master key for wireless sensor networks., , and . StudentWorkshop@CoNEXT, page 27-28. ACM, (2009)A Test Pattern Generation Methodology for Low-Power Consumption., , , and . VTS, page 453-459. IEEE Computer Society, (1998)