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Disambiguation of "Nicopoulos, Chrysostomos"

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Exploring Fault-Tolerant Network-on-Chip Architectures.

, , , , and . DSN, page 93-104. IEEE Computer Society, (2006)

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Chrysostomos Kyprianou

Annette Nicopoulos

Chrysostomos Papaioannou

Chrysostomos Mantzabinos

Chrysostomos Wesdemiotis

 

Other publications of authors with the same name

Streaming Dilated Convolution Engine., , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (3): 401-405 (March 2023)Automatic Generation of Peak-Power Traffic for Networks-on-Chip., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (1): 96-108 (2019)Autonomous Application of Netlist Transformations Inside Lagrangian Relaxation-Based Optimization., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (8): 1672-1686 (2021)An Online and Real-Time Fault Detection and Localization Mechanism for Network-on-Chip Architectures., , , , , , and . ACM Trans. Archit. Code Optim., 13 (2): 22:1-22:26 (2016)BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers., , , , , and . J. Parallel Distributed Comput., (2017)ElastiNoC: A self-testable distributed VC-based Network-on-Chip architecture., , , , and . NOCS, page 135-142. IEEE, (2014)A Hardware-Assisted Heartbeat Mechanism for Fault Identification in Large-Scale IoT Systems., , , , and . IEEE Trans. Dependable Secur. Comput., 19 (2): 1254-1265 (2022)ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers., , , , , and . MICRO, page 333-346. IEEE Computer Society, (2006)Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core., , , , , , , and . DATE, page 812-817. IEEE, (2019)Virtualizing Virtual Channels for Increased Network-on-Chip Robustness and Upgradeability., , , and . ISVLSI, page 21-26. IEEE Computer Society, (2012)