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NAROUTO: An open-source framework for supporting architecture-level exploration at heterogeneous FPGAS., , и . ICECS, стр. 527-530. IEEE, (2010)A novel methodology for designing high-performance and low-energy FPGA routing architecture., , , и . FPGA, стр. 224. ACM, (2006)A virtual platform for exploring hierarchical interconnection for many-accelerator systems., , , и . SAMOS, стр. 384-389. IEEE, (2015)Rapid prototyping and Design Space Exploration methodologies for many-accelerator systems., , , , и . FPL, стр. 1-2. IEEE, (2015)Architecture-Level Exploration of Alternative Interconnection Schemes Targeting 3D FPGAs: A Software-Supported Methodology., , и . Int. J. Reconfigurable Comput., (2008)Automated Design Approximation to Overcome Circuit Aging., , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (11): 4710-4721 (2021)Hardware-Aware Automated Neural Minimization for Printed Multilayer Perceptrons., , , , и . DATE, стр. 1-2. IEEE, (2023)Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator Architectures., , , и . ARC, том 9040 из Lecture Notes in Computer Science, стр. 117-128. Springer, (2015)SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable Platforms., , , , , , , , , и 3 other автор(ы). ARC, том 9040 из Lecture Notes in Computer Science, стр. 475-486. Springer, (2015)AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow., , , , , , , , , и 1 other автор(ы). ASP-DAC, стр. 3-4. ACM Press, (2005)