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An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators.

, , , and . IEEE Access, (2019)

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Continuous-time delta-sigma modulator with an upfront passive-RC low-pass network., , , and . ISOCC, page 9-10. IEEE, (2017)A 0.59-mW 78.7-dB SNDR 2-MHz Bandwidth Active-RC Delta-Sigma Modulator With Relaxed and Reduced Amplifiers., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (3): 1114-1122 (2021)An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators., , , and . IEEE Access, (2019)Power-Efficient Gm-C DSMs With High Immunity to Aliasing, Clock Jitter, and ISI., , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (2): 337-349 (2019)An On-Chip Static and Dynamic DAC Error Correction Technique for High Speed Multibit Delta-Sigma Modulators., , , and . ISCAS, page 1-5. IEEE, (2018)A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator., , and . ISCAS, page 1. IEEE, (2020)A 10-bit 2 MS/s SAR ADC using reverse VCM-based switching scheme., , , , , and . ISCAS, page 1030-1033. IEEE, (2016)Improving Power Efficiency for Active-RC Delta-Sigma Modulators Using a Passive-RC Low-Pass Filter in the Feedback., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (11): 1559-1563 (2018)A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (12): 4592-4605 (2019)A Gm-C Delta-Sigma Modulator With a Merged Input-Feedback Gm Circuit for Nonlinearity Cancellation and Power Efficiency Enhancement., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (4): 1196-1209 (2018)