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Sleep-aware mode assignment in wireless embedded systems.

, , and . J. Parallel Distributed Comput., 71 (7): 1002-1010 (2011)

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Acceleration of Composite Order Bilinear Pairing on Graphics Hardware., , , , and . IACR Cryptology ePrint Archive, (2011)Energy Optimal Task Scheduling with Normally-Off Local Memory and Sleep-Aware Shared Memory with Access Conflict., , , , and . IEEE Trans. Computers, 67 (8): 1121-1135 (2018)Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation., , , , , and . DAC, page 350-355. ACM, (2010)Compiler directed automatic stack trimming for efficient non-volatile processors., , , , , and . DAC, page 183:1-183:6. ACM, (2015)Energy efficient joint scheduling and multi-core interconnect design., , , and . ASP-DAC, page 879-884. IEEE, (2010)A Hardware-Accelerated Solution for Hierarchical Index-Based Merge-Join(Extended Abstract)., , , , , and . ICDE, page 2137-2138. IEEE, (2019)DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (11): 2981-2994 (2017)Stack-Size Sensitive On-Chip Memory Backup for Self-Powered Nonvolatile Processors., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (11): 1804-1816 (2017)Instruction cache locking for multi-task real-time embedded systems., , and . Real Time Syst., 48 (2): 166-197 (2012)EMC: Energy-Aware Morphable Cache Design for Non-Volatile Processors., , , , , and . IEEE Trans. Computers, 68 (4): 498-509 (2019)