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Disambiguation of "Iskander, Yousef"

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High-Level Abstractions and Modular Debugging for FPGA Design Validation.

, , and . ACM Trans. Reconfigurable Technol. Syst., 7 (1): 2:1-2:22 (2014)

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Iskander Ibragimov

Amin Iskander

Amin Iskander

Emad Iskander

Sameh Iskander

 

Other publications of authors with the same name

SCRIPT: A CAD Framework for Power Side-channel Vulnerability Assessment Using Information Flow Tracking and Pattern Generation., , , , , , and . ACM Trans. Design Autom. Electr. Syst., 25 (3): 26:1-26:27 (2020)Security and Trust Verification of IoT SoCs., , , and . Security and Fault Tolerance in Internet of Things, Springer, (2019)The Big Hack Explained: Detection and Prevention of PCB Supply Chain Implants., , , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 16 (4): 42:1-42:25 (2020)Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug., , and . FPL, page 518-523. IEEE Computer Society, (2011)Accelerating FPGA development through the automatic parallel application of standard implementation tools., , , , , , and . FPT, page 53-60. IEEE, (2010)Using partial reconfiguration and high-level models to accelerate FPGA design validation., , , , , , and . FPT, page 341-344. IEEE, (2010)High-Level Abstractions and Modular Debugging for FPGA Design Validation., , and . ACM Trans. Reconfigurable Technol. Syst., 7 (1): 2:1-2:22 (2014)Guest Editorial: Hardware Reverse Engineering and Obfuscation., and . J. Hardw. Syst. Secur., 2 (4): 287-288 (2018)PATIS: Using partial configuration to improve static FPGA design productivity., , , , , and . IPDPS Workshops, page 1-8. IEEE, (2010)Scalable Hardware Trojan Activation by Interleaving Concrete Simulation and Symbolic Execution., , , and . ITC, page 1-10. IEEE, (2018)