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Dual Monitoring Communication for Self-Aware Network-on-Chip: Architecture and Case Study.

, , , and . Int. J. Adapt. Resilient Auton. Syst., 3 (3): 72-91 (2012)

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A Design of Operational Amplifier for Sigma Delta Modulators Using 0.35um CMOS Process., and . VLSI, volume 162 of IFIP Conference Proceedings, page 23-34. Kluwer, (1999)Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation., , , , , and . PECCS, page 450-458. SciTePress, (2012)Hardware/software partitioning and minimizing memory interface traffic., , , , and . EURO-DAC, page 226-231. IEEE Computer Society, (1994)Modeling of On-Chip Bus Switching Current and Its Impact on Noise in Power Supply Grid., , , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (6): 766-770 (2008)Special issue on networks on chip., , and . J. Syst. Archit., 50 (2-3): 61-63 (2004)Combinatorial architectural level power optimization for a class of orthogonal transforms., and . ISCAS (1), page 70-75. IEEE, (1999)Hierarchical Agent Monitoring Design Platform - Towards Self-aware and Adaptive Embedded Systems., , , , and . PECCS, page 573-581. SciTePress, (2011)A DSL for the SegBus platform., , , and . SoCC, page 393-398. IEEE, (2009)System level interconnect design for network-on-chip using interconnect IPs., , , and . SLIP, page 117-124. ACM, (2003)A Computational Scheme Based on Random Boolean Networks., , and . Trans. Computational Systems Biology, (2008)