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A Neuroevolution Method for Dynamic Resource Allocation on a Chip Multiprocessor, , and . Proceedings of the INNS-IEEE International Joint Conference on Neural Networks, page 2355--2361. Piscataway, NJ, IEEE, (2001)On-Chip Interconnection Networks of the TRIPS Chip., , , , , , and . IEEE Micro, 27 (5): 41-50 (2007)Memory Systems., , and . The Computer Science and Engineering Handbook, CRC Press, (1997)Dark Silicon and the End of Multicore Scaling., , , , and . IEEE Micro, 32 (3): 122-134 (2012)Limited bandwidth to affect processor design., , and . IEEE Micro, 17 (6): 55-62 (1997)Dynamic vectorization in the E2 dynamic multicore architecture., , and . SIGARCH Comput. Archit. News, 38 (4): 27-32 (2010)Errata on "Measuring Experimental Error in Microprocessor Simulation"., , , , , , and . SIGARCH Comput. Archit. News, 30 (1): 2-4 (2002)Billion-Transistor Architectures - Guest Editors' Introduction., and . Computer, 30 (9): 46-49 (1997)Memory Systems.. ACM Comput. Surv., 28 (1): 63-65 (1996)Microprocessor pipeline energy analysis., , , , and . ISLPED, page 282-287. ACM, (2003)