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Exploring the Potential of Architecture-Level Power Optimizations.

, and . PACS, volume 3164 of Lecture Notes in Computer Science, page 132-147. Springer, (2003)

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Retrospective on "Power-Sensitive Multithreaded Architecture"., , and . ICCD, page 15-16. IEEE Computer Society, (2012)Power-Sensitive Multithreaded Architecture., , and . ICCD, page 199-206. IEEE Computer Society, (2000)Exploring the Potential of Architecture-Level Power Optimizations., and . PACS, volume 3164 of Lecture Notes in Computer Science, page 132-147. Springer, (2003)Reducing power with dynamic critical path information., , and . MICRO, page 114-123. ACM/IEEE Computer Society, (2001)The Effect of Compiler Optimizations on Pentium 4 Power Consumption., and . Interaction between Compilers and Computer Architectures, page 51-56. IEEE Computer Society, (2003)Architecture-Level Power Optimization - What Are the Limits?, and . J. Instruction-Level Parallelism, (2005)Power-sensitive multithreaded architecture., , and . ICCD, page 17-24. IEEE Computer Society, (2012)Storageless Value Prediction Using Prior Register Values., and . ISCA, page 270-279. IEEE Computer Society, (1999)