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Reliability Measure of Hardware Redundancy Fault-Tolerant Digital Systems with Intermittent Faults.

, and . IEEE Trans. Computers, 30 (8): 600-604 (1981)

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An Examination of Fault Exposure Ratio., , and . IEEE Trans. Software Eng., 19 (11): 1087-1094 (1993)Testing for Timing Faults in Synchronous Sequential Integrated Circuits., and . ITC, page 560-573. IEEE Computer Society, (1983)An Introduction to Software Reliability Models., and . Int. CMG Conference, page 1237-1239. Computer Measurement Group, (1991)Testable design of BiCMOS circuits for stuck-open fault detection using single patterns., , , and . IEEE J. Solid State Circuits, 30 (8): 855-863 (August 1995)Dynamic power minimization during combinational circuit testing as a traveling salesman problem., , , and . Congress on Evolutionary Computation, page 1088-1095. IEEE, (2005)Modeling the Vulnerability Discovery Process., and . ISSRE, page 129-138. IEEE Computer Society, (2005)Principal Component Analysis-based compensation for measurement errors due to mechanical misalignments in PCB testing., , , , and . ITC, page 467-476. IEEE Computer Society, (2010)Use of Storage Elements as Primitives for Modelling Faults in Synchronous Sequential Circuits., , and . VLSI Design, page 118-123. IEEE Computer Society, (1993)Security Vulnerabilities in Software Systems: A Quantitative Perspective., , and . DBSec, volume 3654 of Lecture Notes in Computer Science, page 281-294. Springer, (2005)Automatic test generation using checkpoint encoding and antirandom testing., , and . ISSRE, page 84-95. IEEE Computer Society, (1997)