( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Online Speech Dereverberation Using RLS-WPE Based on a Full Spatial Correlation Matrix Integrated in a Speech Enhancement System.

, , , , , и . IWAENC, стр. 36-40. IEEE, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Hyewon Ahn

John Ahn

Yongpal Ahn

Sungkyoung Ahn

Stephan Ahn

 

Другие публикации лиц с тем же именем

Two versions of architectures for dynamic implied addressing mode., , , , и . J. Syst. Archit., 56 (8): 368-383 (2010)Case Studies on Automatic Extraction of Target-Specific Architectural Parameters in Complex Code Generation., , и . SCOPES, том 2826 из Lecture Notes in Computer Science, стр. 151-166. Springer, (2003)Nop compression scheme for high speed DSPs based on VLIW architecture., , , , , , и . ICCE, стр. 304-305. IEEE, (2014)Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers., и . Trans. High Perform. Embed. Archit. Compil., (2009)Optimistic coalescing for heterogeneous register architectures., , и . LCTES, стр. 93-102. ACM, (2007)Orthogonal Instruction Encoding for a 16-bit Embedded Processor with Dynamic Implied Addressing Mode., , , , и . HPCC, стр. 545-550. IEEE, (2009)Iterative Algorithm for Compound Instruction Selection with Register Coalescing., , , , и . DSD, стр. 513-520. IEEE Computer Society, (2009)Dynamic Operands Insertion for VLIW Architecture with a Reduced Bit-width Instruction Set., , , , и . IPDPS, стр. 119-130. IEEE Computer Society, (2012)Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os., , , , , , и . ICCAD, стр. 747-754. IEEE, (2013)A Graph Drawing Based Spatial Mapping Algorithm for Coarse-Grained Reconfigurable Architectures., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 17 (11): 1565-1578 (2009)