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Disambiguation of "Harjani, Ramesh"

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The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk).

, , , , , , , , , , , , and . ICCAD, page 54:1-54:2. IEEE, (2020)

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Ramesh Ummanni

Ramesh Boggula

Ramesh Sharma

Ramesh Sheth

Ramesh Samanta

 

Other publications of authors with the same name

A 1GHz signal bandwidth 4-channel-I/Q polyphase-FFT filter bank., and . ESSCIRC, page 355-358. IEEE, (2016)A 2.4GHz IEEE 802.15.6 Compliant 1.52nJ/bit TX & 1.32nJ/bit RX Multiband Transceiver for Low Power Standards., and . ICECS, page 821-824. IEEE, (2018)A novel noise optimization design technique for radio frequency low noise amplifiers., , and . ISCAS (1), page 209-212. IEEE, (2003)Analysis and gain design of an integrated quadrature mixer with improved noise and image rejection., and . ISCAS (4), page 786-789. IEEE, (2001)A throughput-agnostic 11.9-13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS., , , , , , and . VLSIC, page 150-. IEEE, (2015)Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%)., and . ISCAS, page 1975-1978. IEEE, (2010)Frequency-Hopped Quadrature Frequency Synthesizer in 0.13-mum Technology., , and . IEEE J. Solid State Circuits, 46 (9): 2021-2032 (2011)Design of Low Power Integrated Radios for Emerging Standards, and . Springer, (2020)High linearity PVT tolerant 100MS/s rail-to-rail ADC driver with built-in sampler in 65nm CMOS., and . CICC, page 1-4. IEEE, (2014)A unified framework for capacitive series-parallel DC-DC converter design., and . CICC, page 1-8. IEEE, (2014)