( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Representing Gate-Level SET Faults by Multiple SEU Faults at RTL.

, , , и . IOLTS, стр. 1-6. IEEE, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Raimund Messner

Raimund Westphal

Raimund Berger

Raimund Petz

Raimund Hoffmann

 

Другие публикации лиц с тем же именем

On automatic software-based self-test program generation based on high-level decision diagrams., , и . LATS, стр. 177. IEEE, (2016)Evolutionary Approach to Test Generation for Functional BIST, , , , и . CoRR, (2010)Automated design error debug using high-level decision diagrams and mutation operators., , , , , и . Microprocess. Microsystems, 37 (4-5): 505-513 (2013)Automated Design Error Localization in RTL Designs., , , , , , , , и . IEEE Des. Test, 31 (1): 83-92 (2014)PSL Assertion Checking Using Temporally Extended High-Level Decision Diagrams., , , и . J. Electron. Test., 25 (6): 289-300 (2009)Representing Gate-Level SET Faults by Multiple SEU Faults at RTL., , , и . CoRR, (2021)Test Generation for Digital Systems Based on Alternative Graphs.. EDCC, том 852 из Lecture Notes in Computer Science, стр. 151-164. Springer, (1994)Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation., , и . ISCAS, стр. 1-5. IEEE, (2018)Replication-Based Deterministic Testing of 2-Dimensional Arrays with Highly Interrelated Cells., , и . DDECS, стр. 21-26. IEEE, (2018)Laboratory framework TEAM for investigating the dependability issues of microprocessor systems., , , и . EWME, стр. 80-83. IEEE, (2014)