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Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface., , , , , , , , , and 3 other author(s). ACM Trans. Design Autom. Electr. Syst., 29 (2): 35:1-35:25 (March 2024)Fridge Compiler: Optimal Circuits from Molecular Inventories., , , and . CMSB, volume 14137 of Lecture Notes in Computer Science, page 236-252. Springer, (2023)FPGA Technology Mapping Using Sketch-Guided Program Synthesis., , , , , , , , and . ASPLOS (2), page 416-432. ACM, (2024)There and Back Again: A Netlist's Tale with Much Egraphin'., , , , , , , , and . CoRR, (2024)Third Eye: A Shopping Assistant for the Visually Impaired., , , , , , , , and . Computer, 50 (2): 16-24 (2017)Specialized Accelerators and Compiler Flows: Replacing Accelerator APIs with a Formal Software/Hardware Interface., , , , , , , , , and 2 other author(s). CoRR, (2022)Generate Compilers from Hardware Models!, , , , , and . CoRR, (2023)Enumerating Hardware-Software Splits with Program Rewriting., , and . CoRR, (2020)Computing With Networks of Oscillatory Dynamical Systems., , , , , , , and . Proc. IEEE, 107 (1): 73-89 (2019)A FeFET Based Processing-In-Memory Architecture for Solving Distributed Least-Square Optimizations., , , , , , , , , and 2 other author(s). DRC, page 1-2. IEEE, (2018)