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Electrically-Tunable Stochasticity for Spin-based Neuromorphic Circuits: Self-Adjusting to Variation., , , , and . MWSCAS, page 81-84. IEEE, (2020)Scalable Reasoning and Sensing Using Processing-In-Memory With Hybrid Spin/CMOS-Based Analog/Digital Blocks., , , , and . IEEE Trans. Emerg. Top. Comput., 11 (2): 343-357 (April 2023)Leveraging design diversity to counteract process variation: theory, method, and FPGA toolchain to increase yield and resilience in-situ., and . IET Comput. Digit. Tech., 13 (3): 250-261 (2019)Intrinsic evolvable hardware platform for digital circuit design and repair using genetic algorithms., and . Appl. Soft Comput., 12 (8): 2470-2480 (2012)SNRA: A Spintronic Neuromorphic Reconfigurable Array for In-Circuit Training and Evaluation of Deep Belief Networks., and . CoRR, (2019)Progress in autonomous fault recovery of field programmable gate arrays., , and . ACM Comput. Surv., 43 (4): 31:1-31:30 (2011)Composable Probabilistic Inference Networks Using MRAM-based Stochastic Neurons., , , and . CoRR, (2018)Data-partitioning using the Hilbert space filling curves: Effect on the speed of convergence of Fuzzy ARTMAP for large database problems., , , and . Neural Networks, 18 (7): 967-984 (2005)Composite spintronic accuracy-configurable adder for low power Digital Signal Processing., , , and . ISQED, page 391-396. IEEE, (2017)Lockdown Computerized Testing Interwoven with Rapid Remediation: A Crossover Study within a Mechanical Engineering Core Course., , and . FIE, page 1-9. IEEE, (2018)