Author of the publication

Automated synthesis of phase shifters for built-in self-testapplications.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (10): 1175-1188 (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

EDT Bandwidth Management in SoC Designs., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (12): 1894-1907 (2012)Embedded deterministic test., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (5): 776-792 (2004)Hardware Protection via Logic Locking Test Points., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3020-3030 (2018)On necessary and nonconflicting assignments in algorithmic test pattern generation., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 13 (4): 515-530 (1994)High Volume Diagnosis in Memory BIST Based on Compressed Failure Data., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (3): 441-453 (2010)Ring generators - new devices for embedded test applications., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (9): 1306-1320 (2004)Logic BIST With Capture-Per-Clock Hybrid Test Points., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (6): 1028-1041 (2019)Low Cost Hypercompression of Test Data., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2964-2975 (2020)On Using Implied Values in EDT-based Test Compression., , , , and . DAC, page 11:1-11:6. ACM, (2014)GEMINI-a logic system for fault diagnosis based on set functions.. FTCS, page 292-297. IEEE Computer Society, (1988)